We are proud to present SiPearl, the European fabless company driving forward the European Processor Initiative (EPI). Founded in June 2019 by Philippe Notton, SiPearl was created with a clear mission: to foster the deployment in Europe of high-performance, energy-efficient processor technologies capable of powering the next generation of supercomputers.
Privately held and supported by the European Union and France, SiPearl designs European CPUs for HPC (High Performance Computing), AI inference, data centres, and dual-use. For its first-generation product, Rhea1, the company works in close collaboration with its 30 partners within the EPI consortium, spanning the scientific community, supercomputing centres, and leading players from the IT, electronics, and automotive sectors, who act as stakeholders, clients, and end-users. Manufactured by TSMC in 6nm process, Rhea1 will equip JUPITER, the first European exascale supercomputer owned by EuroHPC JU and operated by Julich Supercomputing Centre. As the European designer of high-performance, energy-efficient processors, SiPearl addresses strategic challenges in areas such as security, defence, medical research, energy, climate, and engineering, while reducing environmental impact. Through this work, SiPearl makes a decisive contribution to Europe’s technological sovereignty.
Role in the Project
Within the HIGHER project, SiPearl plays a central technical and architectural role. It leads the Architecture and Verification and is responsible for key tasks that shape the foundations of the project’s hardware and software stack. SiPearl’s main contributions include:
- Architecture and Verification: Leading the definition of requirements, architectural specifications, and long-term verification processes to ensure correct HW–SW integration across successive platform versions.
- Requirements Capture: Coordinating the refinement of requirements and use cases, incorporating input from cloud and edge stakeholders to define high-level specifications, platform KPIs, and evaluation targets for the HIGHER architecture.
- RHEA2-based Host Processor Module: Leading the development of Rhea2-based Host Processor Modules (HPMs) compliant with the OCP Full Width HPM (M-FLW) specification.
- Secure Boot and Operating System Bring-up: Leading the ARM secure boot and OS bring-up, from firmware boot to full OS execution, ensuring secure integration with the DC-SCM Root of Trust, correct discovery of OCP-NICs, and proper enumeration of PCIe and CXL devices.
- Management Module Contributions: Contributing to the development of the DC-SCM Management Module and its firmware.
SiPearl is also responsible for delivering dedicated Rhea2-based HPMs, with at least ten modules manufactured and assembled, to be integrated into DC-MHS servers and used by downstream project activities.
Through its leadership in architecture, processor module development, and secure system bring-up, SiPearl is a cornerstone of the HIGHER project. Its work ensures that the project delivers robust, scalable, and secure platforms aligned with open standards, strengthening Europe’s path toward processor independence and next-generation HPC systems capable of supporting both scientific and industrial applications at scale.